Semiconductor circuit manufacturers require two qualities of crystalline silicon wafers to satisfy their production requirements: "prime" quality wafers for use in constructing actual semiconductor products; and "test" quality wafers for use to pre-qualify manufacturing processes for their satisfactory performance. "Prime" wafers are sold to satisfy higher quality standards than "test" wafers. "Test" wafers that exhibit quality standards close to that of "prime" wafers are preferred by semiconductor companies and are sold at a higher price than standard quality "test" wafers. A typical used semiconductor wafer comprises a silicon substrate wafer with semiconducting components implanted and/or diffused into one wafer surface (hereinafter called active surface). Layers of conducting and insulating materials are then formed on the implanted or diffused surfaces of the wafer.
The term "surface layers" as used herein refers both to the portion of the original wafer having implanted and/or diffused components and to the layers formed or deposited on the surface of the original wafer. The term "side" with reference to a wafer refers to a top or bottom surface. The term "edge" with reference to a wafer refers to the surfaces at the outer perimeter or edge of the wafer.
Reclaiming involves removing the layers and portions of the underlying wafer which have been implanted or diffused. Used wafers sent to a reclaim service company have a variety of surface and subsurface structures made from a diverse selection of materials. Some wafers have been used for film thickness monitoring and have several layers of film materials on the surface. Others may be rejects from product wafer manufacturing and have layered structures, sequences and compositions and implanted materials which differ from one wafer to another.
There are several methods in the prior art for reclaiming substrate wafers from used semiconductor wafers. Prior to this invention, these methods weakened the wafers, making them more susceptible to breakage. They furthermore removed such a large amount of material that only from one to three recycles per wafer were obtainable.
Chemical etching is one of the most common techniques used in prior art reclamation processes. Chemical etching for smaller wafers could be batch processes because of the relative uniformity and simplicity of the wafer layers. The process has serious disadvantages and is unsuitable for removing surface layers from larger diameter wafers because of their more complicated surface structures, both in layer sequences and compositions of the layers. The removal of multi-layered films by chemical etching is difficult because each layer of material requires a different etching chemical, leading to a multiple step process uniquely designed for each wafer construction and unsuitable for another wafer with a different structural order and composition. Etching procedures for large wafers are thus sequenced wafer-by-wafer and cannot be conducted in a batch operation with large sized (six inch and larger) wafers.
Furthermore, each of the layers can be patterned, leading to a rate of removal from one portion of a layer which is different from another. This ultimately produces an irregular surface pattern in the surface of the base layer which cannot be avoided. Tungsten silicide (WSi), for example, is extremely difficult to remove by chemical etching.
A mixture of nitric acid (HNO.sub.3) and hydrofluoric acid (HF) is one of the etching compositions used for the reclamation of silicon wafers. Acetic acid is often added to the acid mixture as a buffer to reduce the etching rate for better control of layer removal. Although the mixture is effective for the removal of most film and implant materials, it also etches the substrate silicon wafer rapidly and in a non-uniform manner. Diffusion governs the reaction rate between silicon and the acid mixture, causing non-uniform etching. The acids are consumed more rapidly than they are replaced by the diffusion. When the diameter of the wafer is large, the solution in the central area of the disk is depleted since the acids moieties diffusing from the outer circumference of the disk are depleted before they reach the center of the wafer. Etching at the center is thus slower than at the circumference, leaving the center thicker than the outer portions.
This non-uniformity is even greater if the acid mixture is used for removing foreign materials from a used silicon wafer. Most foreign materials, such as oxide films and nitrides, are etched more slowly than silicon. When a used silicon wafer is submerged in the acid mixture, the acid mixture begins removing material near the circumference first, and by the time the materials at the center are removed, the substrate silicon is exposed to the chemical and etched more rapidly, making the circumferential area of the reclaimed product thinner than the center. The thickness variation can be as large as 20 to 40 microns for eight inch wafers. The product does not satisfy the customer's needs for a wafer of uniform thickness.
Lapping has been applied to removal of surface layers in preparing wafers. In this method, a work surface is pressed against a rotating metal plate while a slurry of abrasive particles is passed between the work surface and the plate. For double side lapping, the wafer is pressed between a pair of opposed metal plates, rotating in opposite directions. Surface removal proceeds as the metal lapping plates, most commonly cast iron plates, move the slurry across the work surface, causing impingement of the work surface by the abrasive particles, and causing micro-fractures of the work's subsurface layers. This process is called "lapping mode surface removal" in this application. The severe impingement occurring using a rigid plate causes deep micro-cracks of subsurface damage on the work's surface.
For semiconductor wafers, the subsurface damage caused by lapping is detrimental to the quality of the wafers if it remains in the final product because micro-cracks can be a source of particles and contamination. Removal of the micro-cracks from the work surface by chemical etching and polishing is required to present an acceptable surface. The amount of material removed in this step is determined by the depth of the deepest micro-cracks.
Lapping is commonly used in prime silicon wafer manufacture where it is used to reduce the thickness of a slice from a single crystal ingot to a specified thickness. Thickness reduction at a cutting rate as high as 5 to 10 microns/min is required for efficient production.
Wafers can also, in principal, be reclaimed by lapping. Unlike chemical etching, lapping removes various foreign materials on the wafer surface in a single step which is independent of the structure, pattern and composition of the layers. However, deep subsurface damage is caused during conventional lapping removal of surface layers, leading to excessive thickness reduction which, because it reduces the number of cycles obtained for each wafer, is not commercially desirable. The industry requirements are only satisfied by wafers having a certain minimum thickness.
Lapping removes materials from the top and bottom surfaces of the wafer, leaving layered materials on the wafer edge. Removal of the edge materials by chemical etching after lapping is undesirable because of the shortcomings of chemical etching processes noted above.
Polishing is a surface removal method which, for single side polishing, involves pressing a work surface against a rotating pad while a slurry of abrasive particles is fed between the pad and the work surface. For double-sided polishing, the wafer is pressed between a pair of opposed pads rotating in opposite directions. The pad holds small abrasive particles in its surface texture and transfers the particles to the work surface through the rotary motion. The work surface is removed by the abrasive particles as they "shave off" the work's surface. This is referred to as "polishing mode surface removal" in this application. The shaving action of the abrasive causes a shallower subsurface damage than lapping abrasive action.
Mechano-chemical polishing involves the addition of various chemicals to the abrasive polishing slurry. These chemicals are matched to the materials being polished to break or weaken atomic bonding at the work's surface and promote the shaving action of the particles. Polishing of silicon wafers employ very small, less than one micron, particles of colloidal silica along with various chemicals including potassium hydroxide (KOH), ammonium hydroxide (NH.sub.4 OH) and alkaloids. Single-side polishing is a common practice for polishing silicon wafers. The function of polishing is to remove the subsurface damage caused by the preceding lapping step and smooth the surface to a mirror finish.
Polishing is used as a final step in wafer reclaiming for the same purpose as for manufacturing prime wafers, that is, to smooth the surface of a lapped and/or etched wafer to a mirror finish. Prior to this invention, removal of foreign materials from used wafers was not used because the conventional polishing processes were not sufficiently aggressive to remove the variety of layers currently presented by used wafers. Polishing to a mirror finish is a conventional final step for preparing prime silicon working surfaces for deposition and implantation.
We have observed that removal of the deeper lattice defects introduced by grinding and lapping require substantial reduction of wafer thickness. Chemical etching to remove these deep lattice defects introduces large, geometrically shaped depressions (called "etch pits") because of etching rate differentials between the different facets of the silicon crystal. The large etch pit size is a result of deep subsurface damage caused by lapping or grinding. A lapped or ground wafer is etched to a depth which removes the subsurface damage or micro-fractures. The resulting wafer has large etch pits on both sides. At least one of the etch pitted surfaces is polished to a mirror finish in the subsequent polishing step. The polish removal must remove sufficient material to exceed the depth of the etch pits. The pit size thus determines the thickness reduction during the polishing step. With the reclaiming processes known prior to this invention, the etch pits have a width above about 20 microns and a corresponding undesirable depth.
Prime wafers are manufactured from thicker blanks or crude wafers sliced from an ingot by sawing, causing unavoidable deep subsurface damage. The etch pit size is not a major concern in prime wafer manufacture because the crude wafers are therefore prepared with sufficient thickness to produce a desired final thickness after the grinding, etching and polishing operations removing all subsurface defects are completed.
In the reclaimed wafer, however, deep etch pits on one side mean a large amount of material must be removed to provide a polished surface on the opposite side. If both sides are polished, the thickness loss is doubled. This severely limits the number of recycles obtained by reclaiming.
U.S. Pat. No. 3,559,281 discloses a method of chemical etching to remove conducting and insulating layers overlying an epitaxial base layer and preparation of the back side of the wafer for use as a working surface by chemical etching followed by polishing. Mechanical removal of the unwanted layers is discouraged as tending to "mechanically stress and weaken the wafer and epitaxial layer."
U.S. Pat. No. 3,923,567 also discloses a wafer reclaiming process comprising chemical etching to remove surface layers. This is followed by surface grinding to introduce lattice defects for gettering purposes. U.S. Pat. No. 3,905,162 discloses grinding processes for introducing lattice defects into finished wafers for gettering purposes.
U.S. Pat. No. 4,869,779 discloses a wafer polishing apparatus and its mode of operation.
U.S. Pat. No. 5,131,979 discloses a wafer reclaiming process comprising stripping away the layers to expose the original wafer surface by chemical etching, alone, or mechanical grinding followed by chemical etching. The wafer edge is removed by edge rounding. The surface is then polished smooth and thermally treated to free the surface of lattice defects and to leave interior lattice defect getter sites.
Grinding is used to remove surface layers and deliberately introduce deep lattice defects for gettering in the silicon structure. With the higher purity of presently available silicon wafers, gettering is no longer required, and the lattice defects are undesirable.